A Low-Jitter Open-Loop All-Digital Clock Generator with 2 Cycle Lock-Time

A portable multiphase clock generator, independent of input duty ratio, has been developed. The proposed open-loop and full-digital architecture has a fast lock time of two clock cycles and is a simple, robust and portable IP. In addition, the complementary delay line is implemented to achieve high phase resolution at a wide frequency range. The generator has been implemented in a 0.18 um CMOS process and operates at variable input frequencies ranging from 800 MHz to 1.6 GHz.