Multiprocessor System-on-Chip Design with Fuzzy Dynamic Scheduling for Parallel Video Processing

The Multiprocessor System-on-Chip is becoming a promising solution for the future complex computers and embedded systems, which are requiring higher performances. This paper addresses the inherent unreliability and instability of the multiple uncertain characteristics of complex embedded multiprocessor systems. In this work, we propose a fuzzy sets description for the multiple uncertain characteristics of system, and using fuzzy set membership calculation to determine the scheduling priorities of tasks and resources, in order to improve the capability of concurrent executions of tasks. And also we present a method estimation of comprehensive analysis on the multiple performances in order to increase utilization factor and balancing loads on processors. We implemented a prototype MPSoC system design, which utilizes the proposed fuzzy dynamic scheduling algorithm to allocating tasks onto the multiprocessors. And in our case study, we design a parallel architecture h.264 encoder, running on a multicore MPSoC system on FPGA.