Towards full 3D, Zero Variability and Zero power future micro/nano-electronics

In the future, drastic power consumption reduction will request less energy greedy device, interconnect, computing technologies and architectures. Challenging tomorrow´s exponentially growing electronic market, towards Autonomous and Mobile systems for new societal needs, request a drastic reduction towards Zero Intrinsic Variability, Heterogeneous and 3D integration at the device, functional and system levels. Maximizing Energy Efficiency of combined Low Power, High Performance CMOS and Memories to contribute to the energy saving balance at system level, become realistic goals.