• DocumentCode
    2425417
  • Title

    Reusing NoC-infrastructure for test data compression

  • Author

    Froese, Viktor ; Ibers, Ruediger ; Hellebrand, Sybille

  • Author_Institution
    Comput. Eng. Group, Univ. of Paderborn, Paderborn, Germany
  • fYear
    2010
  • fDate
    19-22 April 2010
  • Firstpage
    227
  • Lastpage
    231
  • Abstract
    Previous work on testing NoC-based systems has shown that the integrated network can be efficiently reused as test access mechanism (TAM). These approaches exploit the given infrastructure for data transportation. Beyond that, NoC-architectures for nanoscale systems also have to ensure a reliable communication by additional hardware and/or software measures. For example a cyclic redundancy check (CRC) may be added to protect the end-to-end communication between network resources. This paper presents an approach to reuse the CRC hardware for a compression scheme similar to LFSR-reseeding. The experimental results show that competitive compression ratios can be achieved at low extra cost. This way, core testing in NoC-based systems can benefit from test data compression even for standard cores without integrated decompressors.
  • Keywords
    data compression; errors; logic testing; network-on-chip; compression scheme; cyclic redundancy check; reusing NoC infrastructure; standard cores; test access mechanism; test data compression; Communication system software; Costs; Cyclic redundancy check; Hardware; Protection; Software measurement; System testing; Telecommunication network reliability; Test data compression; Transportation; CRC; NoC; Test data compression; reseeding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium (VTS), 2010 28th
  • Conference_Location
    Santa Cruz, CA
  • ISSN
    1093-0167
  • Print_ISBN
    978-1-4244-6649-8
  • Type

    conf

  • DOI
    10.1109/VTS.2010.5469570
  • Filename
    5469570