Design and implementation of an ultra-fast asynchronous FIR filter in GaAs

Author

Nooshabadi, Saeid ; Montiel-Nelson, Juan A.

Author_Institution

Sch. of Electr. Eng., Northern Territory Univ., Casuarina, NT, Australia

Volume

1

fYear

1996

fDate

26-29 Nov 1996

Firstpage

256

Abstract

GaAs technology, and asynchronous design style promise high speed and low power implementation of real time digital signal processing applications. Asynchronous design techniques are employed to implement an FIR filter in MESFET GaAs technology using the DCFL logic family. The reliability of the architecture implementation of an 11-tap FIR filter in terms of speed, area, and power dissipation in GaAs MESFET, 0.6 μm Vitesse technology has been demonstrated

Keywords

FIR filters; III-V semiconductors; MESFET integrated circuits; Schottky gate field effect transistors; digital filters; digital signal processing chips; direct coupled FET logic; field effect logic circuits; gallium arsenide; 0.6 micron; 1 GHz; DCFL logic family; GaAs; III V semiconductor; MESFET technology; Vitesse technology; architecture implementation; area; asynchronous design; high speed implementation; low power implementation; power dissipation; real time digital signal processing applications; reliability; speed; ultra-fast asynchronous FIR filter; CMOS technology; Clocks; Digital signal processing; Finite impulse response filter; Gallium arsenide; MESFETs; Power dissipation; Switches; Transfer functions; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

TENCON '96. Proceedings., 1996 IEEE TENCON. Digital Signal Processing Applications

Conference_Location

Perth, WA

Print_ISBN

0-7803-3679-8

Type

conf

DOI

10.1109/TENCON.1996.608811

Filename

608811