• DocumentCode
    2429735
  • Title

    Promising directions in hardware design verification

  • Author

    Qadeer, Shaz ; Tasiran, Serdar

  • Author_Institution
    Compaq Syst. Res. Center, Palo Alto, CA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    381
  • Lastpage
    387
  • Abstract
    Ensuring the functional correctness of hardware early in the design cycle is crucial for both economic and methodological reasons. However, current verification techniques are inadequate for industrial designs. Formal verification techniques are exhaustive but do not scale; partial verification techniques based on simulation scale well but are not exhaustive. This paper discusses promising approaches for improving the scalability of formal verification and comprehensiveness of partial verification.
  • Keywords
    electronic design automation; formal verification; logic CAD; design cycle; formal verification scalability; hardware design verification; industrial designs; partial verification; Cost function; Design methodology; Formal verification; Hardware; Iterative methods; Pipelines; Process design; Scalability; Signal design; State-space methods;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2002. Proceedings. International Symposium on
  • Print_ISBN
    0-7695-1561-4
  • Type

    conf

  • DOI
    10.1109/ISQED.2002.996776
  • Filename
    996776