• DocumentCode
    2431541
  • Title

    A bias-driven approach for automated design of operational amplifiers

  • Author

    Lin, Cheng-Wu ; Sue, Pin-Dai ; Shyu, XYa-Ting ; Chang, Soon-Jyh

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • fYear
    2009
  • fDate
    28-30 April 2009
  • Firstpage
    118
  • Lastpage
    121
  • Abstract
    This paper presents a transistor-level automation to perform component sizing, power optimization and layout generation for fully-differential operational amplifiers (op-amps). The design variables of the component sizing are bias voltages and bias currents. The free space of the variables is easy to be restricted by circuit constraints. A lookup-table-based scheme is presented to translate the variables into transistor dimensions without much preparing effort. The layout generation employs analog layout skills, such as device matching, dummy cell and guard ring, to have good quality.
  • Keywords
    differential amplifiers; operational amplifiers; fully-differential operational amplifier design; layout generation; lookup-table-based scheme; transistor-level automation; Analog circuits; Circuit simulation; Design optimization; Equations; Operational amplifiers; Process design; Semiconductor device modeling; System-on-a-chip; Transistors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, Automation and Test, 2009. VLSI-DAT '09. International Symposium on
  • Conference_Location
    Hsinchu
  • Print_ISBN
    978-1-4244-2781-9
  • Electronic_ISBN
    978-1-4244-2782-6
  • Type

    conf

  • DOI
    10.1109/VDAT.2009.5158109
  • Filename
    5158109