DocumentCode
2438864
Title
X-tolerant signature analysis
Author
Mitra, Subhasish ; Lumetta, Steven S. ; Mitzenmacher, Michael
Author_Institution
Intel Corp., Folsom, CA, USA
fYear
2004
fDate
26-28 Oct. 2004
Firstpage
432
Lastpage
441
Abstract
Stochastic coding is used to design X-tolerant signature analyzers that can detect defective chips even in the presence of unknown logic values (X´s). These signature analyzers can be used for built-in-self-test applications and test data compression. Application of this technique to industrial designs shows that thousands of X´s can be tolerated while reducing test response data volume by 50 to 2,000 times compared to traditional scan, with practically no impact on test quality.
Keywords
built-in self test; data compression; encoding; logic analysers; logic testing; stochastic processes; X-tolerant signature analysis; built-in self-test; data compression; defective chip detection; industrial designs; signature analyzer design; stochastic coding; Built-in self-test; Circuit faults; Circuit simulation; Clocks; Compaction; Costs; Data compression; Logic design; Logic testing; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2004. Proceedings. ITC 2004. International
Print_ISBN
0-7803-8580-2
Type
conf
DOI
10.1109/TEST.2004.1386979
Filename
1386979
Link To Document