Fault-tolerant BIBD networks

Author

Aupperle, B.E. ; Meyer, J.F.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA

fYear

1988

fDate

27-30 June 1988

Firstpage

306

Lastpage

311

Abstract

The use of multiple buses can improve both the fault tolerance and performance of local area computer networks. Existing schemes either depend on active components for full connectivity or can experience decreased performance as many hosts attempt to access one bus. An architecture class based on balanced incomplete block designs (BIBDs) is proposed to address these problems. A BIBD architecture uses redundant communication channels and exhibits degradable performance as faults occur. The performability of such networks is evaluated, where evaluation is based on stochastic activity network models. The results obtained are provided for comparison of BIBD network performability with that of conventional multibus networks.<>

Keywords

fault tolerant computing; local area networks; multiprocessor interconnection networks; performance evaluation; BIBD architecture; BIBD network performability; balanced incomplete block designs; degradable performance; fault tolerance; fault-tolerant BIBD networks; local area computer networks; multiple buses; redundant communication channels; stochastic activity network models; Communication channels; Computer architecture; Computer networks; Degradation; Fault tolerance; Geometry; Laboratories; Performance evaluation; Redundancy; Stochastic processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on

Conference_Location

Tokyo, Japan

Print_ISBN

0-8186-0867-6

Type

conf

DOI

10.1109/FTCS.1988.5336

Filename

5336