• DocumentCode
    243957
  • Title

    5nm FinFET Standard Cell Library Optimization and Circuit Synthesis in Near-and Super-Threshold Voltage Regimes

  • Author

    Qing Xie ; Xue Lin ; Yanzhi Wang ; Dousti, Mohammad Javad ; Shafaei, Alireza ; Ghasemi-Gol, Majid ; Pedram, Massoud

  • Author_Institution
    Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
  • fYear
    2014
  • fDate
    9-11 July 2014
  • Firstpage
    424
  • Lastpage
    429
  • Abstract
    FinFET device has been proposed as a promising substitute for the traditional bulk CMOS-based device at the nanoscale, due to its extraordinary properties such as improved channel controllability, high ON/OFF current ratio, reduced short-channel effects, and relative immunity to gate line-edge roughness. In addition, the near-ideal subthreshold behavior indicates the potential application of FinFET circuits in the near-threshold supply voltage regime, which consumes an order of magnitude less energy than the regular strong-inversion circuits operating in the super-threshold supply voltage regime. This paper presents a design flow of creating standard cells by using the FinFET 5nm technology node, including both near-threshold and super-threshold operations, and building a Liberty-format standard cell library. The circuit synthesis results of various combinational and sequential circuits based on the 5nm FinFET standard cell library show up to 40X circuit speed improvement and three orders of magnitude energy reduction compared to those of 45nm bulk CMOS technology.
  • Keywords
    CMOS logic circuits; MOSFET; VLSI; circuit optimisation; combinational circuits; integrated circuit design; low-power electronics; sequential circuits; FinFET standard cell library optimization; bulk CMOS technology; circuit speed; circuit synthesis; combinational circuits; energy reduction; near-ideal subthreshold behavior; sequential circuits; size 5 nm; superthreshold supply voltage regime; CMOS integrated circuits; Energy consumption; FinFETs; Libraries; Logic gates; Standards; Timing; 5nm technology; FinFET; near-threshold computing; performance; power consumption; standard cell library;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI (ISVLSI), 2014 IEEE Computer Society Annual Symposium on
  • Conference_Location
    Tampa, FL
  • Print_ISBN
    978-1-4799-3763-9
  • Type

    conf

  • DOI
    10.1109/ISVLSI.2014.101
  • Filename
    6903401