Towards a better EOT - mobility trade-off in high-k oxide/metal gate CMOS devices

Author

Müller, M. ; Duguay, S. ; Guillaumot, B. ; Garros, X. ; Leroux, C. ; Tavel, B. ; Martin, F. ; Rivoire, M. ; Delille, D. ; Boeuf, F. ; Deleonibus, S. ; Skotnicki, T.

Author_Institution

Philips Semicond., Crolles, France

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

367

Lastpage

370

Abstract

In this paper, we present electrical results on damascene CMOS devices containing a HfO/sub 2/ gate oxide and a TiN/W gate electrode and give a detailed analysis of the performance data and the carrier mobility in both pMOS and nMOS devices. We report on an improvement of the electron mobility compared to recent literature data, which seems to be related to a slightly higher interfacial oxide layer. These findings are very interesting regarding the definition of a good trade-off between mobility and EOT for future CMOS transistors using high-k materials for the gate oxide.

Keywords

MOSFET; dielectric thin films; electron mobility; hafnium compounds; hole mobility; semiconductor device metallisation; titanium compounds; tungsten; EOT reduction; HfO/sub 2/-TiN-W; carrier mobility; damascene CMOS devices; electron mobility; high-k gate oxide/metal gate CMOS devices; interfacial oxide layer; nMOS devices; pMOS devices; Electrodes; Electron mobility; Gate leakage; Hafnium; High K dielectric materials; High-K gate dielectrics; MOS devices; Microelectronics; Performance analysis; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid-State Device Research, 2003. ESSDERC '03. 33rd Conference on

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7999-3

Type

conf

DOI

10.1109/ESSDERC.2003.1256890

Filename

1256890