• DocumentCode
    2446337
  • Title

    Development of process bus for busbar protection and voltage selection scheme

  • Author

    Tanaka, Yasuyuki ; Oda, Shigeto ; Adachi, Keigo ; Noguchi, Hideo

  • Author_Institution
    Mitsubishi Electric Corporation, Kobe 6512271, Japan
  • fYear
    2012
  • fDate
    23-26 April 2012
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    Busbar protection is described for a bus with current inputs for up to 32 bays. For busbar protection with IEDs and MUs using IEC61850–9–2 process bus, communication traffic jams are the main concern, due to transferring 80 samples/cycle data from all bay MUs to IED via 100BASE-FX. This paper describes peer-to-peer connection between MUs and IED in order to segrigate the SV messages of 32 bays on the process bus. As a LAN switch is not necessarily required in the process bus, higher reliability, long lifetime, interoperability and easy-maintenance can be achieved. The sampling timing of each MU is controlled from IED by 1PPS signal which is independent from the time stamp signal made by GPS so that lock out of busbar protection is prevented even at the case of GPS clock loss. This technique can be applied not only to busbar protection but also to VSS (voltage selection scheme).
  • Keywords
    Artificial intelligence; Local area networks; Relays; Reliability; Substations; Switches; Timing; IEC61850–9–2; IED (intelligent electronic device); MU (merging unit); VSS (voltage selection scheme); busbar protection; process bus;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Developments in Power Systems Protection, 2012. DPSP 2012. 11th International Conference on
  • Conference_Location
    Birmingham, UK
  • Print_ISBN
    978-1-84919-620-8
  • Type

    conf

  • DOI
    10.1049/cp.2012.0049
  • Filename
    6227537