Verification of Circuits Including Black Box Based on TED

Correct verification is necessary at every design stage of a complex digital system. TED (Tayor Expansion Diagram) can be used not only to bit-level logical function but also to word-level arithmetic function. The method of equivalence checking based on TED is discussed in this paper, then a verifying algorithm for circuit including black box is proposed. Experimental results indicate that a lot of errors can be found at the early design stage using the algorithm in this paper.