DocumentCode
2448493
Title
A 10Gb/s fully differential CMOS transimpedance preamplifier
Author
Tao, Rui ; Berroth, Manfred
Author_Institution
Inst. of Electr. & Opt. Commun. Eng., Stuttgart Univ., Germany
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
549
Lastpage
552
Abstract
A high speed, low noise fully differential transimpedance amplifier has been designed and implemented in 0.18 /spl mu/m standard digital CMOS technology. The parallel feedback circuit topology is adopted to broaden the bandwidth. This preamplifier has a power gain S21 of 22 dB with the bandwidth of 6GHz, and can operate at 10 Gb/s with dynamic range from 2.5/spl mu/A up to 2.5 mA. The power consumption is only 88 mW.
Keywords
CMOS analogue integrated circuits; bandwidth allocation; feedback amplifiers; optical receivers; power consumption; preamplifiers; 6E9 Hz; 8E6 W; bandwidth requirement; differential transimpedance amplifier; digital CMOS; parallel feedback circuit topology; Bandwidth; CMOS technology; Circuit noise; Circuit topology; Differential amplifiers; Dynamic range; Energy consumption; Feedback circuits; Low-noise amplifiers; Preamplifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7995-0
Type
conf
DOI
10.1109/ESSCIRC.2003.1257194
Filename
1257194
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