DocumentCode
2448654
Title
Bond pad and ESD protection structure for 0.25/spl mu/m/0.18/spl mu/m RF-CMOS
Author
Leenaerts, Domine ; Velghe, Rudolf
Author_Institution
Philips Res., Eindhoven, Netherlands
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
569
Lastpage
572
Abstract
In CMOS, standard ESD protections are hindered by parasitic capacitance, area requirements and quality factor. This paper presents dedicated diode network ESD structures together with special bond pad configurations with a satisfactory performance. The amount of used diode area sets the ESD performance and in all cases an excellent RF performance is obtained. We show measurement results for 0.25/spl mu/m and 0.18/spl mu/m CMOS technology.
Keywords
CMOS integrated circuits; MOSFET; electric potential; electrostatic discharge; integrated circuit design; 0.18 micron; 0.25 micron; ESD protection structure; RF-CMOS; area requirements; bond pad configurations; dedicated diode network ESD structures; parasitic capacitance; quality factor; Atherosclerosis; Bonding; CMOS technology; Circuits; Diodes; Electrostatic discharge; Parasitic capacitance; Protection; Q factor; Radio frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7995-0
Type
conf
DOI
10.1109/ESSCIRC.2003.1257199
Filename
1257199
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