A /spl Delta//spl Sigma/ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications

Author

Rogers, John W M ; Cavin, Mark ; Dai, Foster ; Rahn, Dave

Author_Institution

Carleton Univ., Ottawa, Ont., Canada

fYear

2003

fDate

16-18 Sept. 2003

Firstpage

651

Lastpage

654

Abstract

This paper presents a fully integrated multi-band frequency synthesizer architecture. The synthesizer is a /spl Delta//spl Sigma/ based fractional-N frequency synthesizer with three on-chip LC tuned VCOs to cover the entire frequency bands specified in IEEE802.11b, and 802.11a WLAN standards. The synthesizer includes a /spl Delta//spl Sigma/ shaper, a dead-zone-free phase frequency detector and a fully differential charge pump. The measured in-band phase noise is lower than -93dBc/Hz and the VCO out of band phase noise is -120dBc/Hz at 1MHz offset.

Keywords

IEEE standards; delta-sigma modulation; frequency synthesizers; integrated circuit design; phase detectors; voltage-controlled oscillators; wireless LAN; /spl Delta//spl Sigma/ fractional-N frequency synthesizer; IEEE802.11a; IEEE802.11b; LC tuned VCO; WLAN applications; WLAN standards; differential charge pump; in-band phase noise; multiband PMOS VCO; multiband frequency synthesizer architecture; phase frequency detector; Charge pumps; Diodes; Frequency synthesizers; Inductors; Phase frequency detector; Phase noise; Varactors; Voltage; Voltage-controlled oscillators; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European

Conference_Location

Estoril, Portugal

Print_ISBN

0-7803-7995-0

Type

conf

DOI

10.1109/ESSCIRC.2003.1257219

Filename

1257219