DocumentCode
2449408
Title
Offset calibrating comparator array for 1.2-V, 6bit, 4-Gsample/s flash ADCs using 0.13/spl mu/m generic CMOS technology
Author
Okada, Hiroyuki ; Hashimoto, Yasuyuki ; Sakata, Kohji ; Tsukada, Toshiro ; Ishibashi, Koichiro
Author_Institution
STARC, Yokohama, Japan
fYear
2003
fDate
16-18 Sept. 2003
Firstpage
711
Lastpage
714
Abstract
A 1.2-V calibration comparator array for a flash-type ADC has been developed using 0.13/spl mu/m generic CMOS technology. The developed offset calibration technique corrects the offset mismatch better than 6bit resolution. By employing an offset calibration circuit in the comparator array, the comparator array can operate at low supply voltages. To evaluate the comparator array, a-bit flash-type ADC was fabricated that occupies 0.198 mm /sup 2/. With a 1.2-V power supply, it achieves 4.0 GSample/s and consumes 182 mW.
Keywords
CMOS logic circuits; analogue-digital conversion; calibration; comparators (circuits); integrated circuit design; 0.13 micron; 1.2 V; 182 mW; CMOS technology; comparator array; flash-type ADC; offset calibration circuit; offset mismatch; Analog circuits; Analog-digital conversion; CMOS technology; Calibration; Digital circuits; Dynamic range; Logic arrays; Low voltage; Power supplies; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European
Conference_Location
Estoril, Portugal
Print_ISBN
0-7803-7995-0
Type
conf
DOI
10.1109/ESSCIRC.2003.1257234
Filename
1257234
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