• DocumentCode
    2453611
  • Title

    Integrated Design/validation Methodology For Fault Tolerant (dependable) Computing Systems

  • Author

    Bettencourt, Chip

  • Author_Institution
    Raytheon Company
  • fYear
    1994
  • fDate
    25-26 Apr 1994
  • Firstpage
    10
  • Lastpage
    12
  • Keywords
    Application specific integrated circuits; Circuit faults; Circuit testing; Design methodology; Emulation; Fault detection; Fault tolerant systems; Hardware; Logic testing; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrating Error Models with Fault Injection, 1994., Third Int'l Workshop on
  • Type

    conf

  • DOI
    10.1109/WIEM.1994.654392
  • Filename
    654392
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2453611