DocumentCode
2453984
Title
Emulating Optimal Replacement with a Shepherd Cache
Author
Rajan, Kaushik ; Govindarajan, R.
Author_Institution
Indian Inst. of Sci., Bengaluru
fYear
2007
fDate
1-5 Dec. 2007
Firstpage
445
Lastpage
454
Abstract
The inherent temporal locality in memory accesses is filtered out by the L1 cache. As a consequence, an L2 cache with LRU replacement incurs significantly higher misses than the optimal replacement policy (OPT). We propose to narrow this gap through a novel replacement strategy that mimics the replacement decisions of OPT. The L2 cache is logically divided into two components, a Shepherd Cache (SC) with a simple FIFO replacement and a Main Cache (MC) with an emulation of optimal replacement. The SC plays the dual role of caching lines and guiding the replacement decisions in MC. Our proposed organization can cover 40% of the gap between OPT and LRU for a 2MB cache resulting in 7% overall speedup. Comparison with the dynamic insertion policy, a victim buffer, a V-Way cache and an LRU based fully associative cache demonstrates that our scheme performs better than all these strategies.
Keywords
cache storage; content-addressable storage; FIFO replacement; L1 cache; L2 cache; Shepherd cache; associative cache; dynamic insertion policy; main cache; memory access; optimal replacement policy; temporal locality; Automation; Computer science; Computer science education; Emulation; Frequency; History; Microarchitecture; Optimized production technology; Proposals; Supercomputers;
fLanguage
English
Publisher
ieee
Conference_Titel
Microarchitecture, 2007. MICRO 2007. 40th Annual IEEE/ACM International Symposium on
Conference_Location
Chicago, IL
ISSN
1072-4451
Print_ISBN
978-0-7695-3047-5
Electronic_ISBN
1072-4451
Type
conf
DOI
10.1109/MICRO.2007.25
Filename
4408275
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