• DocumentCode
    2455581
  • Title

    Systematic design of a 200 MS/s 8-bit interpolating A/D converter

  • Author

    Vandenbussche, J. ; Lauwers, E. ; Uyttenhove, K. ; Gielen, G. ; Steyaert, M.

  • Author_Institution
    Dept. of Electr. Eng., Katholieke Univ. Leuven, Heverlee, Belgium
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    357
  • Lastpage
    361
  • Abstract
    The systematic design of a high-speed, high-accuracy Nyquist A/D converter is proposed The presented design methodology covers the complete flow and is supported by software tools. A generic behavioral model is used to explore the A/D converter´s specifications during high-level design and exploration. The inputs are the specifications of the A/D converter and the technology process. The result is a generated layout and the corresponding extracted behavioral model. The approach has been applied to a real-life test case, where a Nyquist-rate 8-bit 200 MS/s 4-2 interpolating A/D converter was developed for a WLAN application
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; circuit CAD; circuit layout CAD; high level synthesis; high-speed integrated circuits; integrated circuit design; interpolation; 0.35 micron; 30 MHz; 43 dB; 8 bit; A/D converter; CMOS process; behavioral model; converter specifications; design methodology; generated layout; generic behavioral model; high-accuracy Nyquist ADC; high-level design; high-speed ADC design; interpolating ADC; interpolating/averaging architecture; software tools; Assembly systems; Circuits; Decoding; Design methodology; Error correction; Hardware design languages; Mathematical model; Preamplifiers; Software tools; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
  • Conference_Location
    Paris
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1471-5
  • Type

    conf

  • DOI
    10.1109/DATE.2002.998298
  • Filename
    998298