• DocumentCode
    2456662
  • Title

    Review and classification of gain cell eDRAM implementations

  • Author

    Teman, Adam ; Meinerzhagen, Pascal ; Burg, Andreas ; Fish, Alexander

  • Author_Institution
    VLSI Syst. Center, Ben-Gurion Univ. of the Negev, Beer-Sheva, Israel
  • fYear
    2012
  • fDate
    14-17 Nov. 2012
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    With the increasing requirement of a high-density, high-performance, low-power alternative to traditional SRAM, Gain Cell (GC) embedded DRAMs have gained a renewed interest in recent years. Several industrial and academic publications have presented GC memory implementations for various target applications, including high-performance processor caches, wireless communication memories, and biomedical system storage. In this paper, we review and compare the recent publications, examining the design requirements and the implementation techniques that lead to achievement of the required design metrics of these applications.
  • Keywords
    DRAM chips; integrated circuit design; low-power electronics; GC embedded DRAM; GC memory; SRAM; biomedical system storage; gain cell eDRAM classification; high-performance processor caches; wireless communication memory; Arrays; Bandwidth; MOS devices; Memory management; Random access memory; Transistors; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical & Electronics Engineers in Israel (IEEEI), 2012 IEEE 27th Convention of
  • Conference_Location
    Eilat
  • Print_ISBN
    978-1-4673-4682-5
  • Type

    conf

  • DOI
    10.1109/EEEI.2012.6377022
  • Filename
    6377022