• DocumentCode
    2458343
  • Title

    Efficient Implementation of DFT over GF(qm)

  • Author

    Wu, Huapeng

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Windsor Univ., Windsor, ON
  • fYear
    2006
  • fDate
    Oct. 29 2006-Nov. 1 2006
  • Firstpage
    1180
  • Lastpage
    1182
  • Abstract
    In this paper an algorithm to compute N-point DFT over a finite field qm without multiplication is proposed, where q is a prime power and N is a positive integer not divisible by the characteristic of Fqm. The proposed method uses redundant representation for field elements and it is shown that no multiplication operations in Fq are required for computing N-point DFT. Both bit-serial and bit-parallel architectures to realize the algorithm are also presented that use only finite field adders and registers. One constrain of this method is that m must divide the multiplicative order of q mod N.
  • Keywords
    adders; discrete Fourier transforms; parallel architectures; DFT; bit-parallel architectures; bit-serial architectures; field elements; finite field adders; finite field registers; Arithmetic; Computer architecture; Galois fields; Hardware; Power engineering computing; Registers; Terminology; DFT; Finite field arithmetic; cyclotomic field; redundant representation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
  • Conference_Location
    Pacific Grove, CA
  • ISSN
    1058-6393
  • Print_ISBN
    1-4244-0784-2
  • Electronic_ISBN
    1058-6393
  • Type

    conf

  • DOI
    10.1109/ACSSC.2006.354941
  • Filename
    4176751