DocumentCode
2461183
Title
New algorithms and VLSI architectures for SRT division and square root
Author
McQuillan, S.E. ; McCanny, J.V. ; Hamill, R.
Author_Institution
Dept. of Electr. & Electron. Eng., Queen´´s Univ., Belfast, UK
fYear
1993
fDate
29 Jun-2 Jul 1993
Firstpage
80
Lastpage
86
Abstract
Radix two algorithms for SRT division and square-rooting are developed. For these schemes, the result digits and the residuals are computed concurrently and the computations in adjacent rows are overlapped. Consequently, their performance should exceed that of the radix 2 SRT methods. VLSI array architectures for implementing the new division and square-rooting methods are also presented
Keywords
VLSI; digital arithmetic; SRT division; VLSI architectures; radix 2 SRT methods; residuals; square root; Algorithm design and analysis; Arithmetic; Computer architecture; Concurrent computing; Digital signal processing; Frequency conversion; Microelectronics; Power engineering and energy; Signal processing algorithms; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1993. Proceedings., 11th Symposium on
Conference_Location
Windsor, Ont.
Print_ISBN
0-8186-3862-1
Type
conf
DOI
10.1109/ARITH.1993.378106
Filename
378106
Link To Document