DocumentCode
2461204
Title
Multi-parallel convolvers
Author
Dadda, Luigi ; Piuri, Vincenzo ; Stefanelli, Renato
Author_Institution
Dept. of Electron. & Inf., Politecnico di Milano, Italy
fYear
1993
fDate
29 Jun-2 Jul 1993
Firstpage
70
Lastpage
77
Abstract
A scheme for a convolver design, called a multiparallel convolver, that is based on concurrent processing of p adjacent samples that are input simultaneously to the p-parallel convolver is presented. The scheme uses p units, each of which receives the input samples and produces one convolution every p samples; these are called p-phase subconvolvers. The detailed design of the p-phase subconvolvers and of the whole p-parallel convolver is presented and discussed. The scheme can be used for both the bit-parallel and the bit-serial input presentation of each sample. The input sample rate of the p-parallel convolver is p times the sample rate of a standard (1-parallel) convolver implemented using the same integration technology. The number of components required by a p-parallel convolver is approximately p times the number of components required by a standard convolver
Keywords
convolution; digital arithmetic; parallel architectures; bit-parallel; bit-serial; concurrent processing; convolver design; multiparallel convolver; p-parallel convolver; p-phase subconvolvers; Application software; Clocks; Computer applications; Convolution; Convolvers; Digital signal processing; Fourier transforms; Parallel processing; Sampling methods; Signal sampling;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1993. Proceedings., 11th Symposium on
Conference_Location
Windsor, Ont.
Print_ISBN
0-8186-3862-1
Type
conf
DOI
10.1109/ARITH.1993.378107
Filename
378107
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