• DocumentCode
    2465547
  • Title

    Power-efficient trace caches

  • Author

    Hu, J.S. ; Vijaykrishnan, N. ; Kandemir, M. ; Irwin, M.J.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    1091
  • Abstract
    Summary form only given. This paper exploits the drawbacks of wasting power when accessing the instruction cache that stores only static sequence of instructions. Although trace cache is first introduced to catch the dynamic characteristics of instructions in execution, conventional trace cache (CTC) does increase the power consumption in fetch unit. A Sequential Trace Cache (STC) has been investigated for its power efficiency in this paper
  • Keywords
    cache storage; integrated memory circuits; low-power electronics; dynamic characteristics; dynamic sequences caching; fetch unit; instruction cache; power efficiency; power-efficient trace caches; sequential trace cache; Energy consumption;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
  • Conference_Location
    Paris
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1471-5
  • Type

    conf

  • DOI
    10.1109/DATE.2002.999209
  • Filename
    999209
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2465547