Multipath reversed nested Miller compensation with voltage buffer for low-power three-stage amplifiers

A multipath reversed nested Miller compensation (MRNMC) scheme with voltage buffer (MRNMCVB) is presented in this paper. By using an efficient voltage buffer, a low-voltage, low-power, three-stage RNMC amplifier topology suitable for large capacitive load applications is constructed with a noninverting intermediate stage. Moreover, the internal feedback loop introduced by the buffer prevents the reduction in high-frequency gain and extends the bandwidth of the amplifier significantly. Furthermore, a multipath feedforward stage is added to generate a left-half-plane (LHP) zero, which improves the stability of the amplifier and reduces the size of compensation capacitors simultaneously. An optimized MRNMCVB amplifier has been implemented in a 0.35-mum CMOS process. The amplifier driving a 500-pF load capacitor achieves 1.76-MHz unity-gain frequency (UGF), 59deg phase margin, and 0.88-V/mus average slew rate, while dissipating only 45-muW power at a 1.5-V supply. The total capacitor value is just 2.92-pF.