DocumentCode
2473157
Title
General structure of symbol-rate decision-directed timing error detectors
Author
Daecke, D. ; Schenk, H. ; Haar, S.
Author_Institution
Inst. for Integrated Circuits, Munich Univ. of Technol., Germany
Volume
4
fYear
2003
fDate
1-5 Dec. 2003
Firstpage
2253
Abstract
The general principle of decision-directed timing error detectors, which can operate at the symbol-rate, is developed, based on a linear combination method. From the fundamental structure of decision-directed timing error detectors, numerous implementations can be derived systematically. These timing error detectors have minimal complexity and optimal performance in the control loop, with respect to minimal jitter, and a timing function with a steep slope. Many timing error detectors known from the literature are special cases which can be derived from the general structure, but they only represent a small fraction of the large number of possible implementations. Optimal synchronizer structures can also be derived with a different method, the maximum likelihood criterion. It is shown that the results of the two approaches coincide in the case of a received signal with high-power additive noise.
Keywords
computational complexity; digital communication; random noise; synchronisation; timing jitter; additive noise; complexity; control loop; digital communication; jitter; linear combination; maximum likelihood criterion; symbol-rate decision-directed timing error detectors; timing recovery; Circuits; DSL; Data mining; Detectors; Echo cancellers; Error correction; Frequency synchronization; Phase estimation; Sampling methods; Timing jitter;
fLanguage
English
Publisher
ieee
Conference_Titel
Global Telecommunications Conference, 2003. GLOBECOM '03. IEEE
Print_ISBN
0-7803-7974-8
Type
conf
DOI
10.1109/GLOCOM.2003.1258636
Filename
1258636
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