DocumentCode
2477221
Title
P2B-6 Parallel Image Reconstruction Operation by Dedicated Hardware for Three-Dimensional Ultrasound Imaging
Author
Satoh, Keiichi ; Tada, Jubei ; Yanagida, Hirotaka ; Tamura, Yasutaka
Author_Institution
Yamagata Univ., Yonezawa
fYear
2007
fDate
28-31 Oct. 2007
Firstpage
1522
Lastpage
1525
Abstract
The feasibility of three-dimensional (3D) ultrasound imaging methods involving computations depends on the performance of a computer. To realize efficient high-speed image reconstruction, we examined hardware (HW) implementation that is required. The HW was designed by using VHDL for implementation on a field-programmable gate array (FPGA). This paper first presents an image reconstruction algorithm and subsequently discusses the dedicated HW architecture for performing the image reconstruction.
Keywords
biomedical ultrasonics; field programmable gate arrays; image reconstruction; medical computing; ultrasonic imaging; 3D ultrasound imaging; dedicated hardware; field-programmable gate array; parallel image reconstruction; Concurrent computing; Delay; Field programmable gate arrays; Focusing; Frequency domain analysis; Hardware; Image reconstruction; Systems engineering and theory; Transmitters; Ultrasonic imaging;
fLanguage
English
Publisher
ieee
Conference_Titel
Ultrasonics Symposium, 2007. IEEE
Conference_Location
New York, NY
ISSN
1051-0117
Print_ISBN
978-1-4244-1384-3
Electronic_ISBN
1051-0117
Type
conf
DOI
10.1109/ULTSYM.2007.383
Filename
4409956
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