DocumentCode
2486186
Title
Architectures for the sum of absolute differences operation
Author
Guevorkian, David ; Launiainen, Aki ; Liuha, Petri ; Lappalainen, Ville
Author_Institution
Nokia Res. Center, Espoo, Finland
fYear
2002
fDate
16-18 Oct. 2002
Firstpage
57
Lastpage
62
Abstract
Efficient architectures for computing the sum of absolute differences (SAD) between two data sets are proposed in application to motion estimation in a mobile video coding system. The proposed architectures combine and further develop advantages of two earlier proposed architectures. As a result, higher performance is achieved despite the lower cost (gate count and power consumption) as compared to a conventional architecture. Proposed architectures are feasible for integrating into mobile video processing systems. They support not only regular, data independent motion estimation strategies but all of those based on the SAD criterion. Early termination mechanisms included into the proposed architecture allow one to avoid unnecessary computations which may often take place in conventional SAD architectures without such mechanisms.
Keywords
digital signal processing chips; motion estimation; parallel architectures; pipeline processing; video coding; early termination mechanisms; efficient architectures; mobile video coding system; motion estimation; sum of absolute differences operation; Computer architecture; Costs; Encoding; Energy consumption; Hardware; Mobile computing; Motion estimation; Pipelines; Video coding; Video sequences;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing Systems, 2002. (SIPS '02). IEEE Workshop on
ISSN
1520-6130
Print_ISBN
0-7803-7587-4
Type
conf
DOI
10.1109/SIPS.2002.1049685
Filename
1049685
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