DocumentCode
2487765
Title
Application of on-line test idea for avoidance of timing loop
Author
Yahong, Wang ; Hequan, Wu
Author_Institution
Telecommun. Technol., Acad. Sinica, Beijing, China
fYear
1998
fDate
22-24 Oct 1998
Abstract
With the extensive deployment of SDH, the architecture of synchronization transport network is more complicated. So the timing loop can not be avoided effectively only using a network plan. The existing synchronization statue message (SSM) has a certain effect on avoiding timing loop and should be improved to avoid it as possible. In this paper, the scheme “DUS for test (DUST)” is advanced as an option to the enhancement of SSM, and simulated on a network model, the further refinements are also discussed
Keywords
digital simulation; optical fibre networks; synchronisation; synchronous digital hierarchy; telecommunication equipment testing; DUS for test; DUST; SDH; network model simulation; on-line test idea; synchronization statue message; synchronization transport network architecture; timing loop avoidance; Clocks; Electronic mail; Optical fiber devices; Synchronization; Synchronous digital hierarchy; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Communication Technology Proceedings, 1998. ICCT '98. 1998 International Conference on
Conference_Location
Beijing
Print_ISBN
7-80090-827-5
Type
conf
DOI
10.1109/ICCT.1998.740996
Filename
740996
Link To Document