Compaction with shape optimization [IC layout]

We propose a new compaction problem that allows layout elements to have many shape possibilities. The objective of the problem is to find not only positions but also shapes of layout elements. We present an efficient method to solve the problem-compaction with shape optimization. This method simplifies the problem by considering the optimization of shapes only for the layout elements on a critical path. The layout is compacted step by step while optimizing the shapes of layout elements. Another important aspect of this compaction technique is that it makes layout “recyclable” for other sets of device parameters. The experimental examples, which attempt shape optimization and recycle of an analog layout, confirm the importance and efficiency of our method