Design and FPGA implementation of reduced-complexity MIMO-MLD systems

Multiple-antenna systems, also known as multiple input-multiple output (MIMO) radio, improve the capacity and reliability of radio communication systems. Of considerable concern however is the huge complexity involved in the implementation of such systems. Therefore, the design of low complexity, low cost, MIMO systems that keep most of the advantages and benefits of the full-complexity system has gained significant attentions recently. In this paper, we design and implement on field programmable gate array (FPGA) board, a reduced-complexity MIMO-maximum likelihood detection (MLD) system whose performance is as close as possible to the optimal MLD (full-complexity) system while making significant cut back in the over-all hardware/software complexity (and therefore the operating cost) of the system.