Design of a Low-Power Digital Core for Passive UHF RFID Transponder

Recently RFID (radio-frequency identification) systems have gained popularity in manufacturing units, inventory, logistics, as they represent an inexpensive and reliable solution for automatic identification. RFID tags are expected to become a key element in the future ubiquitous computing scenario. Low-cost passive (i.e. featuring no batteries) tags are supposed to play a major role in this context. UHF tags, in particular, allow for extended read ranges. Performance of such devices, however, is limited by the available power, extracted from the incoming radiation. In this paper, the design of a novel circuit is presented, which implements the digital controller of a UHF-RFID tag in compliance with the ISO 18000-6B protocol. Power-saving strategies are devised, both at the system and the circuit levels. A set of standard cells have been designed, suitable for the power-limited specific application. Physical implementation on CMOS 0.18 mum technology has been carried out and the chip is being fabricated. Functional checks have been successfully performed by means of an FPGA-based prototype