DocumentCode
2496746
Title
[Copyright notice]
fYear
2009
fDate
4-6 Nov. 2009
Firstpage
1
Lastpage
1
Abstract
Topics in this conference are related to: verification methodologies and applications; RTL validation and debug; formal methods for verification; SystemC, to design or to verify?; high-level modeling and validation; system validation approaches; improved verification techniques; reachability analysis; abstraction guided simulation; and post-silicon validation and debug.
Keywords
computer debugging; logic simulation; reachability analysis; RTL debugging; RTL validation; SystemC evaluation; abstraction guided simulation; formal method; high-level modeling; improved verification technique; post-silicon validation; reachability analysis; system validation approach; verification application; verification methodology;
fLanguage
English
Publisher
ieee
Conference_Titel
High Level Design Validation and Test Workshop, 2009. HLDVT 2009. IEEE International
Conference_Location
San Francisco, CA
ISSN
1552-6674
Print_ISBN
978-1-4244-4823-4
Type
conf
DOI
10.1109/HLDVT.2009.5340182
Filename
5340182
Link To Document