Scaling of RF linearity in DG and SOI MOSFETs

This paper investigates and compares the linearity performance of double-gate (DG) and silicon-on-insulator (SOI) MOSFETs in important scaling scenarios concerning gate length, silicon body thickness and gateside-wall thickness. Self-heating effects (SHE) and non-equilibrium transport are included in our simulations. We address the impact of device physics on MOSFETs linearity and find that SHE does not reduce linearity significantly. We conclude that scaling down gate length and silicon body thickness has a negative impact on DG and SOI MOSFET linearity. Increase in the sidewall thickness degrades DG-MOSFETs linearity, while SOI MOSFET linearity improves.