DocumentCode
2501416
Title
Row/column pattern sensitive fault detection in RAMs via built-in self-test
Author
Franklin, M. ; Saluja, K.K. ; Kinoshita, K.
Author_Institution
Dept. of Comput. Sci., Wisconsin Univ., Madison, WI, USA
fYear
1989
fDate
21-23 June 1989
Firstpage
36
Lastpage
43
Abstract
Row-pattern-sensitive and column-pattern-sensitive faults in random-access memories (RAMs) are the class of faults in which the contents of a cell are assumed to be sensitive to the contents of the row and column containing the cell. Although the existence of such faults has been argued in the literature, tests to detect such faults have been proposed. The authors formally define a fault model based on the row and column pattern sensitivity. They establish a lower bound on the length of a test sequence required to detect such faults and propose algorithms that generate test sequences of the required length. Although the length of the test sequence is O(N/sup 3/2/), where N is the number of bits in the RAM, the authors believe that the algorithm can be used to test RAMs in built-in self-test environments.<>
Keywords
automatic testing; computational complexity; integrated circuit testing; logic testing; random-access storage; RAM; RAMs; built-in self-test; column-pattern-sensitive faults; fault model; lower bound; random-access memories; row and column pattern sensitivity; row pattern sensitive faults; test sequence length; Automatic testing; Built-in self-test; Clocks; Fault detection; Random access memory; Read-write memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1989. FTCS-19. Digest of Papers., Nineteenth International Symposium on
Conference_Location
Chicago, IL, USA
Print_ISBN
0-8186-1959-7
Type
conf
DOI
10.1109/FTCS.1989.105540
Filename
105540
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