Power comparisons for barrel shifters

Author

Acken, Kevin P. ; Irwin, Mary Jane ; Owens, Robert M.

Author_Institution

Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA

fYear

1996

fDate

12-14 Aug 1996

Firstpage

209

Lastpage

212

Abstract

Data shifting is required in many key computer operations from address decoding to computer arithmetic. Full barrel shifters are often on the critical path, which has led most research to be directed toward speed optimizations. With the advent of mobile computing, power has become as important as speed for circuit designs. In this paper we present a power-delay analysis for a range of 32-bit barrel shifters that vary at the gate, architecture, and environment levels

Keywords

CMOS logic circuits; data handling; delays; digital arithmetic; logic design; 32 bit; CMOS IC; barrel shifters; circuit design; data shifting; power consumption; power-delay analysis; Circuit synthesis; Computer science; Data engineering; Decoding; Digital arithmetic; Hardware; Mobile computing; Power engineering and energy; Power engineering computing; Power generation;

fLanguage

English

Publisher

ieee

Conference_Titel

Low Power Electronics and Design, 1996., International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-3571-6

Type

conf

DOI

10.1109/LPE.1996.547509

Filename

547509

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2508933