A model for flash analog-to-digital converters with bit-extended error table linearization

Author

McGuinness, Christopher D. ; Balster, Eric J. ; Scarpino, Frank A.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Dayton, Dayton, OH, USA

fYear

2010

fDate

14-16 July 2010

Firstpage

302

Lastpage

305

Abstract

This paper provides a fundamental overview of important metrics and concepts regarding A/D nonlinear distortion. Once reviewed, a sub-bit compensation technique is presented, analyzed, and simulated in the context of a high-speed flash converter. A model is presented to represent the compensator as well as the pre-compensated converter. It is shown that the BEET method of error compensation creates a greater SFDR and SINAD for a converter than traditional error-table compensation. Yet, the BEET method has only a slight increase in hardware complexity compared to traditional error tables.

Keywords

analogue-digital conversion; error statistics; A-D nonlinear distortion; bit-extended error table linearization; error compensation; flash analog-to-digital converters; precompensated converter; signal-to-noise and distortion ratio; spur-free dynamic range; subbit compensation technique; Converters; Mathematical model; Measurement; Quantization; Signal to noise ratio; Transfer functions; Error correction; compensation; data conversion; nonlinear distortion; simulation; table lookup;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace and Electronics Conference (NAECON), Proceedings of the IEEE 2010 National

Conference_Location

Fairborn, OH

ISSN

0547-3578

Print_ISBN

978-1-4244-6576-7

Type

conf

DOI

10.1109/NAECON.2010.5712967

Filename

5712967