DocumentCode
251574
Title
Self-testing checker design for incomplete m-out-of-n codes
Author
Butorina, N.
Author_Institution
Tomsk State Univ., Tomsk, Russia
fYear
2014
fDate
26-29 Sept. 2014
Firstpage
1
Lastpage
4
Abstract
This paper presents the synthesis of self-testing checker (STC) for a subset of l codewords of m-out-of-n code. We consider FPGA realization of the checker.
Keywords
codes; field programmable gate arrays; logic design; logic testing; FPGA realization; STC; codewords; incomplete m-out-of-n codes; self-testing checker design; Built-in self-test; Circuit faults; Computers; Educational institutions; Field programmable gate arrays; Single event upsets;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium (EWDTS), 2014 East-West
Conference_Location
Kiev
Type
conf
DOI
10.1109/EWDTS.2014.7027072
Filename
7027072
Link To Document