New CMOS inverter-based voltage multipliers

Author

Lin, Ho-Cheng ; Wu, Dong-Shiuh ; Kung, Che-Min ; Hwang, Yuh-Shyan ; Chen, Jiann-Jong

Author_Institution

Dept. of Electron. Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan

fYear

2010

fDate

15-17 Dec. 2010

Firstpage

1

Lastpage

4

Abstract

Four new CMOS inverter-based voltage multipliers consisted of PMOS/NMOS pass transistors, inverter circuits, and capacitors are proposed in the paper. The proposed voltage multipliers which combine the functions of rectifiers and charge-pumps improve the power conversion efficiency and reduce the number of passive components therefore they are suitable for the integration. The voltage multiplier with positive output voltage is implemented with TSMC 0.35 μm CMOS 2P4M processes, and the experimental results have showed good agreement with the theoretical analysis. The chip area without pads is only 1.75×1.32 mm² for five-stage positive output voltage of voltage multiplier.

Keywords

CMOS analogue integrated circuits; charge pump circuits; invertors; rectifiers; voltage multipliers; CMOS inverter-based voltage multipliers; PMOS-NMOS pass transistors; TSMC CMOS 2P4M processes; capacitors; charge-pumps; five-stage positive output voltage; inverter circuits; passive components; size 0.35 mum; CMOS integrated circuits; Charge pumps; MOS devices; Radiofrequency identification; Rectifiers; Threshold voltage; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2010 IEEE International Conference of

Conference_Location

Hong Kong

Print_ISBN

978-1-4244-9997-7

Type

conf

DOI

10.1109/EDSSC.2010.5713740

Filename

5713740