A GaAs Bi-FET technology for large scale integration

Author

Itakura, K. ; Shimamoto, Y. ; Ueda, T. ; Katsu, S. ; Ueda, D.

Author_Institution

Matsushita Electron. Corp., Osaka, Japan

fYear

1989

fDate

3-6 Dec. 1989

Firstpage

389

Lastpage

392

Abstract

A GaAs Bi-FET technology which opens a new field of III-V LSI is discussed. The Bi-FET consists of a GaAs-GaAlAs heterobipolar transistor (HBT) and a modulation-doped FET (MODFET), giving it the advantages of both low power consumption in MODFET and large current driving capability, in HBT. The Bi-FET technology is based on a developed structure where the MODFET is merged into the collector region of the HBT through a single epitaxial growth. An inverter circuit has been implemented with the Bi-FET technology, which has a minimum gate delay of 150 ps with power dissipation of 3.0 mW/gate.<>

Keywords

III-V semiconductors; aluminium compounds; gallium arsenide; heterojunction bipolar transistors; high electron mobility transistors; integrated circuit technology; large scale integration; monolithic integrated circuits; 150 ps; Bi-FET; GaAs; GaAs-GaAlAs; HBT; collector region; inverter circuit; large current driving capability; large scale integration; low power consumption; minimum gate delay; modulation-doped FET; power dissipation; single epitaxial growth; Energy consumption; Epitaxial growth; Epitaxial layers; FETs; Gallium arsenide; HEMTs; Heterojunction bipolar transistors; III-V semiconductor materials; Large scale integration; MODFET circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1989. IEDM '89. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1989.74304

Filename

74304