DocumentCode
2524304
Title
Reliable Networked Reconfiguration of FPGAs with HW/SW Co-design Architecture
Author
Li, Peng ; Han, Jizhong ; He, Jin
Author_Institution
Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing
fYear
2008
fDate
29-31 July 2008
Firstpage
580
Lastpage
586
Abstract
Many FPGAs are served as network devices today. The ability of networked reconfiguration of such devices can enable the control and upgrading of them from a long distance. Previous researches on networked reconfiguration focused on hardware implementation of network protocols, neglecting there configuration integrity and security. This paper analyzed potential threats to reconfiguration integrity and bitstream security in network circumstances, and then addressed our hardware/software co-design solution and implementation. The proposed networked reconfiguration system made use of reliable network protocol and encryption algorithms, so it was not only easy to be implemented and operated but also secure and robust.
Keywords
field programmable gate arrays; hardware-software codesign; FPGA; bitstream security; encryption algorithms; hardware-software codesign solution; networked reconfiguration; Computer architecture; Cryptography; Design methodology; Embedded software; Field programmable gate arrays; Hardware; Logic devices; Protocols; Reconfigurable logic; Runtime; FPGA; hw/sw co-design; network; run-time reconfiguration; security;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Software and Systems, 2008. ICESS '08. International Conference on
Conference_Location
Sichuan
Print_ISBN
978-0-7695-3287-5
Type
conf
DOI
10.1109/ICESS.2008.19
Filename
4595613
Link To Document