DocumentCode
252514
Title
Effects of back-gate bias on switched-capacitor DC-DC converters in UTBB FD-SOI
Author
Turnquist, M.J. ; de Streel, G. ; Bol, D. ; Hiienkari, M. ; Koskinen, L.
Author_Institution
Dept. of Micro- & Nanosci., Aalto Univ., Aalto, Finland
fYear
2014
fDate
6-9 Oct. 2014
Firstpage
1
Lastpage
2
Abstract
This paper explores the effects of back-gate bias on switched-capacitor (SC) DC-DC converters in 28 nm UTBB FD-SOI. By using back-gate bias to optimize the control circuitry and switches, the SC converter can operate with a peak efficiency of 72% in sleep mode (100 nW load) and 83% in active mode (100 μW load).
Keywords
DC-DC power convertors; silicon-on-insulator; SC converter; UTBB FD-SOI; active mode; back-gate bias; control circuitry optimization; sleep mode; switched-capacitor DC-DC converters; Amplitude modulation; DC-DC power converters; Educational institutions; MOS devices; Switches; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
Conference_Location
Millbrae, CA
Type
conf
DOI
10.1109/S3S.2014.7028200
Filename
7028200
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