• DocumentCode
    2525425
  • Title

    High-coverage ATPG for datapath circuits with unimplemented blocks

  • Author

    Kim, Hyungwon ; Hayes, John P.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
  • fYear
    1998
  • fDate
    18-23 Oct 1998
  • Firstpage
    577
  • Lastpage
    586
  • Abstract
    Conventional ATPG cannot effectively handle designs employing IP circuits (cores) whose implementation details are either unknown, unavailable, or subject to change. A new ATPG program RIBTEC for such designs is described that employs a functional (behavioral) fault model based on a class of non-exhaustive “universal” test sets. Given a circuit´s high-level block structure, RIBTEC constructs a universal test set for each block from its functional description in such a way that realization-independence of the blocks is ensured. Experimental results are presented for representative datapath circuits, which show that RIBTEC achieves very high fault coverage and an exceptionally high level of realization independence
  • Keywords
    VLSI; automatic test pattern generation; fault diagnosis; industrial property; integrated circuit testing; logic testing; IP circuits; RIBTEC; cores; datapath circuits; functional fault; high-coverage ATPG; high-level block structure; nonexhaustive universal test set; representative datapath circuits; unimplemented blocks; universal test set; Automatic test pattern generation; Circuit faults; Circuit testing; Design for testability; Design methodology; Electrical fault detection; Fault detection; Logic arrays; Logic testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1998. Proceedings., International
  • Conference_Location
    Washington, DC
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-5093-6
  • Type

    conf

  • DOI
    10.1109/TEST.1998.743201
  • Filename
    743201