OxRAM-based pulsed latch for non-volatile flip-flop in 28nm FDSOI

Author

Levisse, A. ; Jovanovic, N. ; Vianello, E. ; Portal, J.-M. ; Thomas, O.

Author_Institution

Univ. Grenoble Alpes, Grenoble, France

fYear

2014

fDate

6-9 Oct. 2014

Firstpage

1

Lastpage

2

Abstract

Emerging connected devices operating on battery or harvested energy sources highlight the need for ultra-low standby power design. Including non-volatility in flip-flops (FF) allows nullifying the power consumption in sleep mode, while maintaining the system state. Most of the reported solutions require FF modifications while increasing their complexity. This paper presents a non-volatile flip-flop (NVFF) designed as an OxRAM-based pulsed latch tied to a regular FF for ultra-wide voltage range applications. In 28nm CMOS FDSOI, adding non-volatility cut-off the FF leakage at the cost of 63pJ of data store and restore energy and less than 15% of delay penalty.

Keywords

CMOS memory circuits; flip-flops; low-power electronics; resistive RAM; silicon-on-insulator; CMOS FDSOI; OxRAM-based pulsed latch; nonvolatile flip-flop; oxide-based ReRAM technology; size 28 nm; ultralow standby power design; ultrawide voltage range applications; CMOS integrated circuits; Computer architecture; Delays; Flip-flops; Latches; Nonvolatile memory; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE

Conference_Location

Millbrae, CA

Type

conf

DOI

10.1109/S3S.2014.7028226

Filename

7028226