DocumentCode
252587
Title
A very low power CMOS 28FDSOI programmable fractional frequency divider for Wifi-WiGig
Author
Vallet, M. ; Richard, O. ; Deval, Y. ; Belot, D.
Author_Institution
STMicroelectron., Crolles, France
fYear
2014
fDate
6-9 Oct. 2014
Firstpage
1
Lastpage
3
Abstract
A 2.4 GHz very low-power programmable fractional frequency divider is presented in this work. A new kind of pulse swallowing architecture is exposed, offering news possibilities in terms of frequency range, frequency step and power consumption. This circuit was designed and implemented in 28nm FDSOI CMOS from STMicroelectronics. The divider consumes 300 μA over 1 V.
Keywords
CMOS analogue integrated circuits; UHF integrated circuits; frequency dividers; low-power electronics; silicon-on-insulator; wireless LAN; FDSOI CMOS; STMicroelectronics; Wifi-WiGig; current 300 muA; frequency 2.4 GHz; frequency range; frequency step; power consumption; pulse swallowing architecture; size 28 nm; very low-power programmable fractional frequency divider; CMOS integrated circuits; CMOS technology; Computer architecture; Frequency conversion; Layout; Power demand; Radiation detectors; 28nm FDSOI CMOS; Wifi-WiGig convergence; fractional frequency divider; low power;
fLanguage
English
Publisher
ieee
Conference_Titel
SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2014 IEEE
Conference_Location
Millbrae, CA
Type
conf
DOI
10.1109/S3S.2014.7028234
Filename
7028234
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