Near-threshold voltage operation of a nonvolatile SRAM cell based on pseudo-spin-FinFET architecture

The bias assist techniques and power switch design for stable near-threshold voltage operations of the NV-SRAM cell are investigated. Although the pull-up of VDD is necessary for the store operation, this executes only at the moment of the shutdown of the cell and the energy required for the store operation can be completely compensated by the shutdown during a period prescribed by break-even time [8]. The NV-SRAM cell using PS-FinFETs is promising for the NVPG architecture of near-threshold-voltage CMOS logic systems.