DocumentCode
252629
Title
Etch-hole design in encapsulation for better robustness
Author
Jae-Wung Lee ; Sharma, Jaibir ; Merugu, Srinivas ; Singh, Navab
Author_Institution
Inst. of Microelectron., Singapore, Singapore
fYear
2014
fDate
3-5 Dec. 2014
Firstpage
42
Lastpage
45
Abstract
This paper reports various etch-hole schemes based on the location and quantities of etch holes to improve robustness of the Thin Film Encapsulation (TFE). In order to achieve robust TFE, different etch hole mapping is performed on the cap layer and robustness of TFE was evaluated by measuring the height of the TFE using optical profiler measurement after sealing. For demonstrating the TFE, amorphous Si and AlN (or SiO2) were used as a sacrificial layer and the cap layer, respectively. Etching of a-Si sacrificial layer was performed with help of XeF2. Experimental result shows that the quantity of etch holes and their location on the cap layer influence the downward deformation of the TFE after sealing process. A uniformly distributed etch holes scheme is effective in controlling the stress of encapsulation which results in low downward deformation..
Keywords
III-V semiconductors; aluminium compounds; deformation; elemental semiconductors; encapsulation; etching; silicon; thin films; wide band gap semiconductors; AlN; Si; cap layer; downward deformation; encapsulation; etch hole mapping; etch-hole design; optical profiler measurement; robustness; sacrificial layer; sealing; sealing process; thin film encapsulation; Cavity resonators; Encapsulation; Etching; III-V semiconductor materials; Micromechanical devices; Robustness; Strain;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Packaging Technology Conference (EPTC), 2014 IEEE 16th
Conference_Location
Singapore
Type
conf
DOI
10.1109/EPTC.2014.7028256
Filename
7028256
Link To Document