Low threshold voltage CMOS devices with smooth topography for 1 volt applications

CMOS devices with ultra-low threshold voltage, high performance, and smooth topography are fabricated for 1 volt applications. Novel features of the devices include (1) enhanced self-aligned twin-tub with low surface dopant level, deep concentration profile, and low n-p tub boundary height, (2) dual-gate implant with wafer tilted to achieve thin gate height while suppressing ion penetration, and (3) use of hard-mask and sidewall dielectrics to protect the TiN dual-gate shunt layer against oxidation. Excellent device characteristics has been demonstrated in this work.<>