R-CBIST: an effective RAM-based input vector monitoring concurrent BIST technique

In this paper a novel input vector monitoring concurrent BIST technique based on a RAM (R-CBIST) is presented. This technique compares favorably to the other input vector monitoring concurrent BIST techniques proposed so far with respect to the hardware overhead and the time required for the concurrent test to be completed (concurrent test latency). R-CBIST can be used in practice for exhaustive testing of ROMs since it results in small hardware overhead whereas no need to stop the ROM normal operation is required